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Control flow computers and Data flow computers (Data driven, Demand driven). Classification of computer architectures by Flynn’s taxonomy. Parallel processing – multi-core, multiprocessor and multiple computers based systems, the concept of parallel processing. Amdahl's and Gustafson's law. Performance metrics. English: PDF: 01_introduction_b4m35pap-en.pdf ODP: 01_introduction_b4m35pap-en.odp BBB Session Recoding
Superscalar processors with static, dynamic, and hybrid scheduling of instructions execution. English: PDF: 02_superskalar_organization_introduction_b4m35pap-en.pdf ODP: 02_superskalar_organization_introduction_b4m35pap-en.odp BBB Session Recording You should already know: pipelining_a4m36pap.pdf
Registers renaming (Tomasul algorithm) and data speculation. Precise exception support. English: PDF: 03_superskalar_technics_data_flow_inside_processor_b4m35pap-en.pdf ODP: 03_superskalar_technics_data_flow_inside_processor_b4m35pap-en.odp BBB Session Recording
Prediction, predictors and instructions prefetching. Static and dynamic predictions; Smith's predictor, two-level predictors with local and global history, bi-mode, adaptive branch prediction technique, and more. Branch misprediction recovery. English: PDF: 04_superskalar_technics_instruction_prefetching_b4m35pap-en.pdf ODP: 04_superskalar_technics_instruction_prefetching_b4m35pap-en.odp BBB Session Recording
Data flow from / to memory. Load bypassing and Load forwarding. Speculative load. Some other ways to reduce memory latency. VLIW and EPIC processors. Use of data parallelism, SIMD and vector instruction in ISA. Loop unrolling and Software pipelining - Execution on WLIV and superscalar processor. English: PDF: 05_superskalar_technics_memory_data_flow_vliw_and_epic_b4m35pap-en.pdf ODP: 05_superskalar_technics_memory_data_flow_vliw_and_epic_b4m35pap-en.odp BBB Session Recording
Non-Blocking cache, Victim cache, Virtual memory and cache. English: PDF: 06_memory_b4m35pap-en.pdf ODP: 06_memory_b4m35pap-en.odp BBB Session Recording
Multiprocessor computers architectures. Distributed and shared memory systems (DMS, SMS). Symmetric multiprocessor computer architectures. Methods to ensure coherence in SMP. English: PDF: 07-memory_coherence_b4m35pap-en.pdf ODP: 07-memory_coherence_b4m35pap-en.odp BBB Session Recording
Rules for performing memory operations, ensuring sequential consistency, memory consistency models. English: PDF: 08-memory_consistency-b4m35pap-en.pdf ODP: 08-memory_consistency-b4m35pap-en.odp BBB Session Recording
Introduction. English: PDF: 09_parallelism_b4m35pap-en.pdf ODP: 09_parallelism_b4m35pap-en.odp BBB Session Recording
Parallel systems programming concepts, using Message Passing Interface (MPI) and Open Multi-Processing (OpenMP) to create parallel programs. English: PDF: 10_parallelism_programming_b4m35pap-en.pdf ODP: 10_parallelism_programming_b4m35pap-en.odp
Synchronization. Code optimization. Cache maintenance, consequences of coherence protocols. Included if time allows.
Static and dynamic interconnection network. English: PDF: 11_interconnection_networks_b4m35pap-en.pdf ODP: 11_interconnection_networks_b4m35pap-en.odp BBB Session Recording
English: PDF: 13_gpu_and_gpgpu_b4m35pap.pdf ODP: 13_gpu_and_gpgpu_b4m35pap.odp BBB Session Recording
Sample of selected partitions on processor Intel Nehalem, AMD Optreon, IBM Power4, ARM, AArch64, RISC-V.
Intel and AMD x86 English: PDF: 12-x86_architecture-en.pdf ODP: 12-x86_architecture-en.odp BBB Session Recording ARM, AArch64, RISC-V: English: PDF: 12-risc-arch-b4m35pap-en.pdf ODP: 12-risc-arch-b4m35pap-en.odp BBB Session Recording
English: PDF: 14_history_and_future_b4m35pap.pdf ODP: 14_history_and_future_b4m35pap.odp BBB Session Recording
English: PDF: 14_spectre_meltdown_and_others.pdf ODP: 14_spectre_meltdown_and_others.odp BBB Session Recording - presented by Karel Kočí, CZ.nic
Materials to refresh knowledge about I/O subsystem: PCIe, HyperTransport, QuickPathInterconnect 10_io_podsystem.pdf
Lectures 2019/2020
Lectures 2018/2019
Lectures 2016/2017