BE4M35PAP - Advanced Computer Architectures

B4M35PAP - Pokročilé architektury počítačů

distedu - Distance education organization

Official pages for the subject

Contents of subject pages

Timetable 2020

Regular meetings planned weekly on Fridays, start at 11:00 finish 14:15
KN:E-2

Ing. Pavel Píša, PhD.

Ing. Karel Kočí

Ing. Joel Matějka - not teaching in 2020 winter term

Important links

Subject discussion forum

Week #1
(21.09. – 27.09.)
Week #2
(28.09. – 04.10.)
Week #3
(05.10. – 11.10.)
Week #4
(12.10. – 18.10.)
Week #5
(19.10. – 25.10.)
Week #6
(26.10. – 01.11.)
Week #7
(02.11. – 08.11.)
Week #8
(09.11. – 15.11.)
Week #9
(16.11. – 22.11.)
Week #10
(23.11. – 29.11.)
Week #11
(30.11. – 06.12.)
Week #12
(07.12. – 13.12.)
Week #13
(14.12. – 20.12.)
Week #14
(04.01. – 10.01.)

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101	Link	Recording of BBB conference room for course M35PAP

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101	Link	Recording of BBB conference room for course M35PAP

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101	Link	Recording of BBB conference room for course M35PAP

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Type	When		Parallel ID	URI	Description
lecture	Fri	11:00 – 12:30	1	Link	Recording of BBB conference room for course M35PAP
tutorial	Fri	12:45 – 14:15	101		No URI provided yet

Aktuality

2018:
- September

0 Post(s) for May 2023

2018/09/18 20:59

Syllabus

1. Introduction
Control flow computers and Data flow computers (Data driven, Demand driven). Flynn’s taxonomy. Parallel processing. Amdahl’s and Gustavson’s law. Metrics.

2. From scalar processors to superscalar processors (basic organization of superscalar processor)
Static, dynamic and hybrid scheduling of the instruction flow

3. Superscalar techniques I – Register data flow
Register renaming (Tomasulo’s algorithm) and data speculation. Precise exception support.

4. Superscalar techniques II – Instruction flow, speculation
Prediction and Predictors, Branch misprediction recovery

5. Superscalar techniques III - Memory data flow; VLIW and EPIC
Load bypassing and Load forwarding. Load speculation.; Data parallelism, SIMD and vector instructions in ISA; Loop-unrolling and software pipelining.

6. Memory subsystem
Non-blocking cache, Victim cache, Virtual memory and cache

7. Multiprocessor systems and Memory coherence
Distributed memory systems (DMS) and Shared memory systems (SMS). Symmetric multiprocessor systems (SMP). Coherence in SMP

8. Multiprocessor systems and Memory consistency
Rules for memory operations, Sequential consistency and other consistency models.

9. Parallel computing I – Data consistency on multiprocessor system
Parallel computing concepts, Programming issues, Parallel programming paradigms, Message Passing Interface (MPI) and Open Multi-Processing (OpenMP)

10. Parallel computing II
Synchronization

11. I/O subsytem
PCIe, HyperTransport, QuickPathInterconnect

12. MPP and clusters, interconnection networks
Static and dynamic interconnection networks

13. Architecture perspectives

Literature

Hennessy, J. L., and D. A. Patterson. Computer Architecture: A Quantitative Approach, 3rd ed. San Mateo, CA: Morgan Kaufman, 2002. ISBN: 1558605967.
Patterson, D. A., and J. L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 3rd ed. San Mateo, CA: Morgan Kaufman, 2004. ISBN: 1558606041.
Shen, J.P., Lipasti, M.H.: Modern Processor Design : Fundamentals of Superscalar Processors, First Edition, New York, McGraw-Hill Inc., 2004
Grama A., Gupta, A. et al.: Introduction to Parallel Computing, Second Edition, Addison Wesley, 2003
Harris, D., M., Harris, S., L.: Digital Design and Computer Architecture, Second Edition, Morgan Kaufmann, 2012