dual_boot |

2016.10.12.18:44:48 | Datasheet

Overview

clk_0 | dual_boot

All Components
dual_boot altera_dual_boot 16.0
Memory Map

dual_boot
avalon

## clk_0

clock_source v16.0

## Parameters
clockFrequency | 50000000
clockFrequencyKnown | true
inputClockFrequency | 0
resetSynchronousEdges | NONE
deviceFamily | UNKNOWN
generateLegacySim | false

## Software Assignments (none)

## dual_boot

altera_dual_boot v16.0

clk_0 | clk | dual_boot
clk
clk_reset
nreset

## Parameters
INTENDED_DEVICE_FAMILY | MAX10FPGA
CLOCK_FREQUENCY | 50.0
CONFIG_CYCLE | 18
RESET_TIMER_CYCLE | 26
deviceFamily | UNKNOWN
generateLegacySim | false

## Software Assignments (none)

generation took 0.00 seconds | rendering took 0.01 seconds