====== 7. Vstupně výstupní subsystém - 1. část ======
{{.:lekce07-io.pdf|PDF}}
[[https://gitlab.fel.cvut.cz/b35apo/apo-slides/-/tree/main/07-io|TeX]]
=== Další materiály ===
{{..:..:en:lectures:07:b35apo_lecture07-io-1.pdf|Input/Output Subsystem - Part 1}}
{{..:..:en:lectures:07:b35apo_lecture07-io-1.odp|ODP}}
=== Programové ukázky ===
Program na výpis řetězce na sériový port pro QtRvSim
.equ SERIAL_PORT_BASE, 0xffffc000
#base address of QtRVSim serial port
.equ SERP_RX_ST_REG, 0xffffc000 #Receiver status register
.equ SERP_RX_ST_REG_o, 0x0000 #Offset of RX_ST_REG
.equ SERP_RX_ST_REG_READY_m, 0x1 #Data byte is ready to be read
.equ SERP_RX_ST_REG_IE_m, 0x2 #Enable Rx ready interrupt
.equ SERP_RX_DATA_REG, 0xffffc004 #Received data byte in 8 LSB bits
.equ SERP_RX_DATA_REG_o, 0x0004 #Offset of RX_DATA_REG
.equ SERP_TX_ST_REG, 0xffffc008 #Transmitter status register
.equ SERP_TX_ST_REG_o, 0x0008 #Offset of TX_ST_REG
.equ SERP_TX_ST_REG_READY_m, 0x1 #Transmitter can accept next byte
.equ SERP_TX_ST_REG_IE_m, 0x2 #Enable Tx ready interrupt
.equ SERP_TX_DATA_REG, 0xffffc00c #Write word to send 8 LSB bits
.equ SERP_TX_DATA_REG_o, 0x000c #Offset of TX_DATA_REG
write:
li a0, SERIAL_PORT_BASE # a0 ukazuje na zacatek pameti UART
la a1, text_1 # nacti ukazatel na retezec
next_char:
lb t1, 0(a1) # nacti znak k odeslani
beq t1, zero, end_char # 0 ukoncuje retezec
addi a1, a1, 1 # posun ukazatel
tx_busy:
lw t0, SERP_TX_ST_REG_o(a0) # zjisti statu odesilaci fronty
andi t0, t0, SERP_TX_ST_REG_READY_m # vymaskuj bit READY
beq t0, zero, tx_busy # pokud neni volno v UARTU cekej zkus to znovu
sw t1, SERP_TX_DATA_REG_o(a0) # je volno - zapis bajt
j next_char # posli dalsi znak
end_char:
ebreak # ukonci program
.data
text_1:
.asciz "Hello world.\n" # retezec ukonceny 0
Program čtení ze sériového portu pro QtRvSim
.equ SERIAL_PORT_BASE, 0xffffc000
#base address of QtRVSim serial port
.equ SERP_RX_ST_REG, 0xffffc000 #Receiver status register
.equ SERP_RX_ST_REG_o, 0x0000 #Offset of RX_ST_REG
.equ SERP_RX_ST_REG_READY_m, 0x1 #Data byte is ready to be read
.equ SERP_RX_ST_REG_IE_m, 0x2 #Enable Rx ready interrupt
.equ SERP_RX_DATA_REG, 0xffffc004 #Received data byte in 8 LSB bits
.equ SERP_RX_DATA_REG_o, 0x0004 #Offset of RX_DATA_REG
.equ SERP_TX_ST_REG, 0xffffc008 #Transmitter status register
.equ SERP_TX_ST_REG_o, 0x0008 #Offset of TX_ST_REG
.equ SERP_TX_ST_REG_READY_m, 0x1 #Transmitter can accept next byte
.equ SERP_TX_ST_REG_IE_m, 0x2 #Enable Tx ready interrupt
.equ SERP_TX_DATA_REG, 0xffffc00c #Write word to send 8 LSB bits
.equ SERP_TX_DATA_REG_o, 0x000c #Offset of TX_DATA_REG
gets:
li a0, SERIAL_PORT_BASE # a0 ukazuje na zacatek pameti UART
la a1, text_1 # nacti ukazatel na buffer
addi t2, zero, 40
next_char:
rx_not_ready:
lw t0, SERP_RX_ST_REG_o(a0) # zjisti statu prijimaci fronty
andi t0, t0, SERP_RX_ST_REG_READY_m # vymaskuj bit READY
beq t0, zero, rx_not_ready # pokud neni znak UARTU cekej zkus to znovu
lw t1, SERP_RX_DATA_REG_o(a0) # je znak - precti ho a tim odstran
sb t1, 0(a1) # uloz znak do bufferu
addi t1, t1, -13 # test je to novy radek?
beq t1, zero, end_char # ukoncuje cteni
addi a1, a1, 1 # posun ukazatel
addi t2, t2, -1 # kontroluj kolik muzeme nacist
bne t2, zero, next_char
end_char:
ebreak # ukonci program
.data
text_1:
.word 0,0,0,0,0,0,0,0,0,0
Program pro práci s otočnými voliči v QtRvSim
#base of SPILED port region
.equ SPILED_REG_BASE, 0xffffc100
#RGB LED 1 barevne slozky – 8 bitu kazda
.equ SPILED_REG_LED_RGB1, 0xffffc110
.equ SPILED_REG_LED_RGB1_o, 0x0010
#RGB LED 2 barevne slozky – 8 bitu kazda
.equ SPILED_REG_LED_RGB2, 0xffffc114
.equ SPILED_REG_LED_RGB2_o, 0x0014
#Tri 8 bitove otocne volice
#nejvyssi bajt informace o stitsknuti
.equ SPILED_REG_KNOBS_8BIT, 0xffffc124
.equ SPILED_REG_KNOBS_8BIT_o, 0x0024
#32 LEDek kazdy bit jedna LED dioda
.equ SPILED_REG_LED_LINE, 0xffffc104
.equ SPILED_REG_LED_LINE_o, 0x0004
li a0, SPILED_REG_BASE # a0 ukazuje na zacatek pameti pro I/O
ori t2, t2, -1
loop:
lw t0, SPILED_REG_KNOBS_8BIT_o(a0) # nacti data od otocnych volicu
sw t0, SPILED_REG_LED_RGB1_o(a0)
xor t1, t0, t2
sw t1, SPILED_REG_LED_RGB2_o(a0)
srli t0, t0, 24
andi t0, t0, 4
beq t0, zero, loop # pokud nebyl zmacknut cerveny volic
ebreak # ukonci program
{{:courses:b35apo:lectures:07:signal_speed.gif?600| Vliv frekvence na paralelní sběrnici}}
{{ :courses:b35apo:lectures:07:signal_speed.mp4 | Vliv frekvence na paralelní sběrnici}}