====== 3. Seminar - Design of simple processor control unit ======

Task assignment and description: EN: {{ .:03_seminar_assignment-en.pdf |}} CZ: {{.:03_cviceni_zadani.pdf|}}
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The second part of the seminar - Explanation of basic instructions of selected CPU and their use

Description of RISC-V instruction set and architecture at RISCV.org pages

[[https://riscv.org/technical/specifications/|https://riscv.org/technical/specifications/]]

  * Volume 1, Unprivileged Spec
  * Volume 2, Privileged Spec

The compact decription of the RISC-V instructions {{https://cw.fel.cvut.cz/b212/_media/courses/b35apo/tutorials/03/riscvcard.pdf  | riscvcard.pdf}}

Detailed description of minimal RISC-V subset:

^ Instruction ^ Instruction Syntax ^ Operation ^ Description ^
| add   | <nowiki>add rd, rs1, rs2</nowiki>   | <nowiki>rd ← rs1 + rs2;</nowiki>   | Add: Add together values in two registers <nowiki>(rs1 + rs2)</nowiki> and stores the result in register <nowiki>rd</nowiki>. |
| addi   | <nowiki>addi rd, rd1, imm12</nowiki>   | <nowiki>rd ← rs1 + imm12;</nowiki>   | Add immediate: Adds a value in <nowiki>rs1</nowiki> and a signed constant (12-bit immediate value) and stores the result in <nowiki>rd</nowiki>. |
| sub   | <nowiki>sub rd,rs1,rs2</nowiki>       | <nowiki>rd ← rs1 - rs2</nowiki>  | Subtract: Subtracts a value in register <nowiki>rs2</nowiki> from value of <nowiki>rs1</nowiki> and stores result in <nowiki>rd</nowiki>. |
| bne   | <nowiki>bne rs1, rs2, Label</nowiki>   | <nowiki>if rs1 != rs2 go to PC+2*imm12; else go to PC+4</nowiki> | Branch on not equal: (conditional) jump if value in <nowiki>rs1</nowiki> is not equal to a value in <nowiki>rs2</nowiki> (imm12 = Label - PC)|
| beq   | <nowiki>beq rs1, rs2, Label</nowiki>   | <nowiki>if rs1 == rs2 go to PC+2*imm12; else go to PC+4</nowiki>   | Branch on equal: (conditional) jump if value in <nowiki>rs1</nowiki> is equal to a value in <nowiki>rs2</nowiki> (imm12 = Label - PC) |
| slt | <nowiki>slt rd,rs1,rs2</nowiki> | <nowiki>rd ← (rs1 < rs2)</nowiki> | Set on less than: set register <nowiki>rd</nowiki> to one, if the condition <nowiki>rs1 < rs2</nowiki> is true |
| slli | <nowiki>slli rd,rs1,imm5</nowiki> | <nowiki>rd ← rs1 << imm5</nowiki> | Shift Left Logical: Shifts value in the register to the left by imm5 bits (ekvivalent to operation multiplication by constant 2<sup>imm5</sup> )  |
| j  | <nowiki>j Label</nowiki>                 | <nowiki>PC ← PC + 2*imm20</nowiki> | Jump:  unconditional jump to the Label (imm20 = Label - PC)|
| lw    | <nowiki>lw rd, imm12(rs1)</nowiki>     | <nowiki>[rd] ← Mem[[rs1] + imm12];</nowiki> |Load word: Loads a word from address in memory and stores it in register <nowiki>rd</nowiki>. |
| sw    | <nowiki>sw rs2, imm12(rs1)</nowiki>     | <nowiki>Mem[[rs1] + imm12] ← [rs2];</nowiki> | Store word: Stores a value in register <nowiki>rs2</nowiki> to given address in memory. |
| lui  | <nowiki>lui rd, imm20</nowiki> | <nowiki>[rd] ← imm20<<12</nowiki> | Load upper immediate: Stores given immediate value (constant) imm20 to upper part of register <nowiki>rd</nowiki>. Register is 32 bits long and imm20 is 20 bits. |
| li   | <nowiki>li rd, Immediate</nowiki>     | <nowiki>lui rd, (Immediate+0x800)[31:12];</nowiki> \\ <nowiki>addi rd,rd, Immediate[11:0]</nowiki> | Load Immediate: sets register <nowiki>rd</nowiki> to 32-bitovou constant. It is pseudo-instruction - it is translated into sequence of actual instructions according to the value range. |
| la   | <nowiki>la rd, LabelAddr</nowiki>     | <nowiki>auipc rd, (LabelAddr - pc + 0x800)[31:12];</nowiki> \\ <nowiki>addi rd, rd, (LabelAddr - pc)[11:0];</nowiki> | Load Address: sets register <nowiki>rd</nowiki> 32-bit value computer relative to actual PC/instruction address. It is pseudo-instruction - it is translated into sequence of actual instructions according to the value range.|


Description of individual MIPS instructions:
^ Instruction ^ Instruction Syntax ^ Operation ^ Description ^
| add   | <nowiki>add \$d, \$s, \$t</nowiki>   | <nowiki>\$d = \$s + \$t;</nowiki>   | Add: Add together values in two registers <nowiki>(\$s + \$t)</nowiki> and stores the result in register <nowiki>\$d</nowiki>. |
| addi   | <nowiki>addi \$t, \$s, C</nowiki>   | <nowiki>\$t = \$s + C;</nowiki>   | Add immediate: Adds a value in <nowiki>\$s</nowiki> and a signed constant (immediate value) and stores the result in <nowiki>\$t</nowiki>. |
| sub   |  <nowiki>sub \$d,\$s,\$t</nowiki>       | <nowiki>\$d = \$s - \$t</nowiki>   | Subtract: Subtracts a value in register <nowiki>\$t</nowiki> from value of <nowiki>\$s</nowiki> and stores result in <nowiki>\$d</nowiki>. |
| and   | <nowiki>and d,s,t</nowiki>       | <nowiki>\$d = s & \$t</nowiki>   | And: Logical and (bit-wise conjunction) |
| andi  | <nowiki>andi d,s,C</nowiki>       | <nowiki>\$d = s & C</nowiki>   | And immediate: Logical and with constant (no sign extension of C) |
| or    | <nowiki>or d,s,t</nowiki>       | <nowiki>\$d = \$s | \$t</nowiki>   | Or: Logical or (bit-vise inclusive disjunction) |
| ori    | <nowiki>ori d,s,t</nowiki>       | <nowiki>\$d = \$s | C</nowiki>   | Or: Logical or with constant (no sign extension of C) |
| slt   | <nowiki>slt \$d, \$s, \$t</nowiki>   | <nowiki>\$d = \$s + \$t;</nowiki>   | Set if less then: if value <nowiki>\$s < \$t</nowiki> set <nowiki>\$d</nowiki> to 1 else to 0. |
| bne   | <nowiki>bne \$s, \$t, offset</nowiki>   | <nowiki>if \$s != \$t go to PC+4+4*offset; else go to PC+4</nowiki> | Branch on not equal: (conditional) jump if value in <nowiki>\$s</nowiki> is not equal to a value in <nowiki>\$t</nowiki>. |
| beq   | <nowiki>beq \$s, \$t, offset</nowiki>   | <nowiki>if \$s == \$t go to PC+4+4*offset; else go to PC+4</nowiki>   | Branch on equal: (conditional) jump if value in <nowiki>\$s</nowiki> is equal to a value in <nowiki>\$t</nowiki>. |
| jump  | <nowiki>j C</nowiki>                 | <nowiki>PC = (PC ∧ 0xf0000000) ∨ 4*C</nowiki> | Jump:  Unconditional jump to label C. |
| lw    | <nowiki>lw \$t,C(\$s)</nowiki>    | <nowiki>\$t = Memory[\$s + C]</nowiki> | Load word: Loads a word from address in memory and stores it in register <nowiki>\$t</nowiki>. |
| sw    | <nowiki>sw \$t,C(\$s)</nowiki>     | <nowiki>Memory[\$s + C] = \$t</nowiki> | Store word: Stores a value in register <nowiki>\$t</nowiki> to given address in memory. |
| lui  | <nowiki>lui \$t,C</nowiki>  | <nowiki> \$t = C << 16</nowiki> | Load upper immediate: Stores given immediate value (constant) C to upper part of register <nowiki>\$t</nowiki>. Register is 32 bits long and C is 16 bits. |


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==== Examples how to transcribe short fragments of C language code into assembler ====

^ **//if//** command ^^
| <code C> 
if (i ==j)
  f = g + h;

f = f – i;
</code> | <code>
//   s0=f, s1=g, s2=h, s3=i, s4=j

  bne s3, s4, L1   // If i!=j, go to label L1
  add s0, s1, s2   // if block: f=g+h
L1:
  sub s0, s0, s3   // f = f-i
</code> |



^ **//if-else//** Command ^^
| <code C>
if (i ==j)
  f = g + h;
else
  f = f – i;

</code> | <code>
//   s0=f, s1=g, s2=h, s3=i, s4=j

  bne s3, s4, else  // If i!=j, go to else label
  add s0, s1, s2    // if block: f=g+h
  j L2              // jump behind the else block to L2
else:
  sub s0, s0, s3    // else block: f = f-i
L2:
</code> |


^ **//while//** Cycle ^^
| <code C>
int pow = 1;
int x = 0;

while(pow != 128)
{
  pow = pow*2;
  x = x + 1;
}
</code> | <code>
// s0=pow, s1=x

  addi s0, $0, 1     // pow = 1
  addi s1, $0, 0     // x = 0
  addi t0, $0, 128   // t0 = 128 pro porovnávání

while:
  beq  s0, t0, done  // compare pow with value 128 in t0 (always have to compare two registers)
  sll  s0, s0, 1     // pow = pow*2
  addi s1, s1, 1     // x = x+1
  j    while
done:
</code> |


^ **//for//** Cycle ^^
| <code C>
int sum = 0;

for(int i=0; i!=10; i++)
{
  sum = sum + i;
}
</code> | <code C>
// Is equivalent to following while cycle::
int sum = 0;

int i = 0;
while(i!=10){
  sum = sum + i;
  i++;
}
</code> |


^ Read values from the data memory. ^^
| <code C>
// // Just as an example...
int a, *pa=0x80020040;
int b, *pb=0x80020044;
int c, *pc=0x00001234;

a = *pa;
b = *pb;
c = *pc;
</code> | <code>
// s0=pa (Base address), s1=a, s2=b, s3=c

lui  s0, 0x8002   // pa = 0x80020000;
lw   s1, 0x40(s0)     // a = *pa;
lw   s2, 0x44(s0)     // b = *pb;

addi s0, $0, 0x1234   // pc = 0x00001234;
lw   s3, 0x0(s0)      // c = *pc;
</code> |


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