~~NOTOC~~ ====== BE4M35PAP - Advanced Computer Architectures ====== === B4M35PAP - Pokročilé architektury počítačů === === A8M36ACA - Pokročilé architektury počítačů === The regular in person education is planned for 2021 winter term\\ Note for the case of forced switch to distance education\\ [[.:distedu:start|distedu - Distance education organization]] //**Official pages for the subject**// * [[https://www.fel.cvut.cz/cz/education/bk/predmety/48/78/p4878806.html|BE4M35PAP on FEL study pages]] * [[https://www.fel.cvut.cz/cz/education/bk/predmety/47/02/p4702206.html|B4M35PAP on FEL study pages]] * [[https://fel.cvut.cz/cz/education/bk/predmety/26/99/p2699006.html|A8M36ACA on FEL study pages]] //**Contents of subject pages**// * [[.:classification:start]] * [[.:lectures:start]] * [[.:tutorials:start]] * [[.:teacher:start]] //**Timetable 2020**// * Regular meetings planned weekly on Fridays, start at 11:00 finish 14:15 * [[https://www.fel.cvut.cz/cz/education/rozvrhy-ng.B211/public/html/mistnosti/10/11/m10119604.html|KN:E-2]] Ing. Pavel Píša, PhD. Ing. Karel Kočí Ing. Joel Matějka - not teaching in 2021 winter term //**Important links**// * [[https://cw.felk.cvut.cz/forum/forum-1745.html|Subject discussion forum]] * [[https://cw.felk.cvut.cz/forum/forum-1677.html|Old subject discussion forum 2020]] {{CWREMOTESCHEDULE}} ===== Aktuality ===== {{blog>courses:B4M35PAP:news?10}} ===== Syllabus ===== **1. Introduction** \\ Control flow computers and Data flow computers (Data driven, Demand driven). Flynn’s taxonomy. Parallel processing. Amdahl’s and Gustavson’s law. Metrics. \\ **2. From scalar processors to superscalar processors (basic organization of superscalar processor)** \\ Static, dynamic and hybrid scheduling of the instruction flow \\ **3. Superscalar techniques I – Register data flow ** \\ Register renaming (Tomasulo’s algorithm) and data speculation. Precise exception support. **4. Superscalar techniques II – Instruction flow, speculation** \\ Prediction and Predictors, Branch misprediction recovery \\ **5. Superscalar techniques III - Memory data flow; VLIW and EPIC** \\ Load bypassing and Load forwarding. Load speculation.; Data parallelism, SIMD and vector instructions in ISA; Loop-unrolling and software pipelining. \\ **6. Memory subsystem** \\ Non-blocking cache, Victim cache, Virtual memory and cache\\ **7. Multiprocessor systems and Memory coherence** \\ Distributed memory systems (DMS) and Shared memory systems (SMS). Symmetric multiprocessor systems (SMP). Coherence in SMP \\ **8. Multiprocessor systems and Memory consistency** \\ Rules for memory operations, Sequential consistency and other consistency models. \\ **9. Parallel computing I – Data consistency on multiprocessor system** \\ Parallel computing concepts, Programming issues, Parallel programming paradigms, Message Passing Interface (MPI) and Open Multi-Processing (OpenMP)\\ **10. Parallel computing II** \\ Synchronization \\ **11. I/O subsytem** \\ PCIe, HyperTransport, QuickPathInterconnect \\ **12. MPP and clusters, interconnection networks** \\ Static and dynamic interconnection networks **13. Architecture perspectives** ===== Literature ===== - Hennessy, J. L., and D. A. Patterson. Computer Architecture: A Quantitative Approach, 3rd ed. San Mateo, CA: Morgan Kaufman, 2002. ISBN: 1558605967. - Patterson, D. A., and J. L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 3rd ed. San Mateo, CA: Morgan Kaufman, 2004. ISBN: 1558606041. - Shen, J.P., Lipasti, M.H.: Modern Processor Design : Fundamentals of Superscalar Processors, First Edition, New York, McGraw-Hill Inc., 2004 - Grama A., Gupta, A. et al.: Introduction to Parallel Computing, Second Edition, Addison Wesley, 2003 - Harris, D., M., Harris, S., L.: Digital Design and Computer Architecture, Second Edition, Morgan Kaufmann, 2012