The first semester project - deadline for submission is week 10
Complete assignment of the first semester project: 01_semester_project.pdf
Project evaluation:
Points | |
---|---|
Transcription of the simulated program into the symbolic address language | 3 |
Rewrite of the program in a machine code with an example of coding of at least two instructions | 2 |
Design of system (CPU, memory, program) in Verilog language | 9 |
Simulation (verifying the functionality of the design) | 7 |
Sources formating, commentaries of solution and design functions and description of system functionality, schematic | 4 |
Total: | 25 |
It is necessary to achieve at least 15 points (inclusive) for the successful submission of the project.
The use of C language compiler mips-elf-gcc is allowed, same as the program mips-elf-as for translation from symbolic address language to machine code and for relocation and completion of binary code linker mips-elf-ld can be used.
The Debian packages can be download from binutils-mips-elf_2.20.51-1_amd64.deb and gcc-mips-elf_4.4.4-1_amd64.deb
Next commands can be used for installation
sudo dpkg -i Downloads/binutils-mips-elf_2.20.51-1_amd64.deb sudo dpkg -i Downloads/gcc-mips-elf_4.4.4-1_amd64.deb
Useful external pointers:
QtMIPS - MIPS Simulator: http://github.com/Cynerd/QtMips
QtSpim - MIPS Simulator: http://pages.cs.wisc.edu/~larus/spim.html
MipsIt - MIPS Simulator: http://www.bostream.nu/mats.brorsson/mipsit/
Compiler: https://sites.google.com/site/lccretargetablecompiler/
Compiler Win: http://code.google.com/p/micron-sysv3/downloads/detail?name=mips-elf-gcc.rar&can=2&q=
MIPS Environment over Cygwin on Windows: http://faculty.cs.tamu.edu/bettati/Courses/410/2006C/Projects/gxemulcygwin.html
MIPS Cross-compiler: https://eng.ucmerced.edu/soe/computing/il/collaboratory/collab-software/compilers-and-interpreters/mips-cross-compiler-package
You can base your data and program memory modules on the following Verilog code fragment - take it as an inspiration which is sufficient for our purposes.:
module dmem (input clk, we, input [31:0] a, wd, output [31:0] rd); reg [31:0] RAM[127:0]; assign rd = RAM[a[7:2]]; // word aligned always@(posedge clk) if(we) RAM[a[31:2]] <= wd; endmodule
module imem (input [5:0] a, output [31:0] rd); // The "a" is the address of instruction to fetch, what // for our purpose can be taken from ProgramCounter[7:2] reg [31:0] RAM[127:0]; initial $readmemh ("memfile.dat",RAM); assign rd <= RAM[a]; // word aligned endmodule