====== 5. CPU Pipelined Execution  ======

**Pipelined Instruction Execution Hazards, Delay slots, Stages Balancing, Super-scalar Systems**

New English language slides (work in progress):

{{.:apo-lecture05-pipeline-en.pdf|}}


Stable version from previous years:

{{.:b35apo_lecture05-pipeline.pdf|}}

{{.:b35apo_lecture05-pipeline.odp|}}